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中島 義賢ナカジマ ヨシカタ

所属・担当
バイオ・ナノサイエンス融合専攻
バイオ・ナノエレクトロニクス研究センター
職名准教授
メールアドレス
ホームページURLhttp://www.eng.toyo.ac.jp/~ryoshil/
生年月日
Last Updated :2017/07/19

研究者基本情報

基本情報

    プロフィール:I received my PhD in 2005 and am a research associate professor at the Graduate School of Interdisciplinary New Science, Toyo University, Japan since 2012. I had been engaged in the research of ultra thin SOI MOSFETs with high density of trap states. Recently, I am interested in nanoelectronics and bio-nano fusion such as the interaction between semiconductors and biomolecules for the design of micro-total analysis systems.

学歴

  •  - 2002年, 東洋大学, 工学研究科, 電気工学専攻
  •  - 2000年, 東洋大学, 工学部, 電気電子工学科

学位

  • 博士(工学), 東洋大学

所属学協会

  • 応用物理学会
  • IEEE

研究活動情報

研究分野

  • 電気電子工学, 電子・電気材料工学
  • 電気電子工学, 電子デバイス・電子機器

研究キーワード

    磁性ナノ粒子, Electrophoretic Coulter Method, マイクロ流体デバイス, SOI基板, MOSFET

論文

MISC

  • 希少糖含有糖脂質の合成と解析, 平田圭亮, 内田貴司, 内田貴司, 中島義賢, 中島義賢, 水木徹, 水木徹, 日本糖質学会年会要旨集, 35th,   2016年08月01日
  • 希少糖を用いた酸化グラフェンの還元および機能性の付与, 小堺悠可, 平田圭亮, 内田貴司, 内田貴司, 中島義賢, 中島義賢, 水木徹, 水木徹, 日本農芸化学会大会講演要旨集(Web), 2016,   2016年03月05日
  • Magnetospirillum magneticum RSS‐1株におけるFe3O4‐Sm2O3コアシェルナノ粒子の形成, 下重裕一, 中島義賢, 柳澤圭一, 小林英城, 水木徹, 島村繁, 井上明, 前川透, 日本農芸化学会大会講演要旨集(Web), 2016,   2016年03月05日
  • 多層グラフェンに対する低エネルギー窒素イオンの照射効果, 大島大命, 前川透, 吉田善一, 中島義賢, 内田貴司, 応用物理学会春季学術講演会講演予稿集(CD-ROM), 63rd,   2016年03月03日
  • 希土類元素含有磁性粒子を形成する磁性細菌の探索, 下重裕一, 水木徹, 中島義賢, 小林英城, 島村繁, 井上明, 前川透, 日本農芸化学会大会講演要旨集(Web), 2015,   2015年03月05日
  • 電気泳動コールター法における精度向上, 清水俊彰, 水木徹, 鵜飼智文, 東利晃, 中島義賢, 花尻達郎, 応用物理学会春季学術講演会講演予稿集(CD-ROM), 62nd,   2015年02月26日
  • SOQ MOSFET特性の照射光波長依存性, 西澤悠佑, 山田辰哉, 東利晃, 中島義賢, 花尻達郎, 応用物理学会春季学術講演会講演予稿集(CD-ROM), 62nd,   2015年02月26日
  • 電気泳動コールター法における電気浸透流の抑制, 清水俊彰, 吉原祐介, 安喜敦士, 鵜飼智文, 中島義賢, 花尻達郎, 化学とマイクロ・ナノシステム学会研究会講演要旨集, 28th,   2013年12月05日
  • 電気泳動コールター法を用いた生体細胞のゼータ電位の評価, 尾形和平, 高橋直寛, 中島義賢, 花尻達郎, 応用物理学関係連合講演会講演予稿集(CD-ROM), 59th,   2012年02月29日
  • SOQ基板の光・電子融合デバイスへの応用の検討, 宮澤元, 中島義賢, 花尻達郎, 応用物理学関係連合講演会講演予稿集(CD-ROM), 59th,   2012年02月29日
  • 極薄膜SOQ pinダイオードの発光特性, 谷村貴行, 中島義賢, 花尻達郎, 応用物理学関係連合講演会講演予稿集(CD-ROM), 57th,   2010年03月03日
  • 片浦プロットの実験的検証, 岡本和久, 千壽宏明, 渡辺将史, 中島義賢, 花尻達郎, 応用物理学関係連合講演会講演予稿集(CD-ROM), 57th,   2010年03月03日
  • コールター法を用いたマイクロチャネル電気泳動法の提案および実験的検証, 高橋直寛, 安喜敦士, 鵜飼智文, 中島義賢, 前川透, 花尻達郎, 応用物理学会学術講演会講演予稿集, 70th,   2009年09月08日
  • 離散的イオンランダム分布におけるSOI‐MOSFETデバイスシミュレーション, 志川智也, 中島義賢, 花尻達郎, 鳥谷部達, 応用物理学会学術講演会講演予稿集, 70th,   2009年09月08日
  • SIMOX基板特有の高密度トラップとSOI/BOX界面凹凸との相関, 渡邉幸俊, 中島義賢, 鳥谷部達, 花尻達郎, 菅野卓雄, 応用物理学会学術講演会講演予稿集, 70th,   2009年09月08日
  • ゲート酸化膜のトラップがSOI MOSFETトンネル電流に与える影響の評価, 戸田貴大, 中島義賢, 花尻達郎, 鳥谷部達, 菅野卓雄, 応用物理学関係連合講演会講演予稿集, 56th,   2009年03月30日
  • 選択的BOXを有するSOI MOSFETの有用性, 前川貴信, 山田辰哉, 宮澤吉康, 中島義賢, 花尻達郎, 鳥谷部達, 菅野卓雄, 応用物理学関係連合講演会講演予稿集, 55th,   2008年03月27日
  • BOX比誘電率およびBOX膜厚制御によるDIBLの抑制効果, 阿部俊平, 宮澤吉康, 中島義賢, 花尻達郎, 鳥谷部達, 菅野卓雄, 応用物理学会学術講演会講演予稿集, 69th,   2008年09月02日
  • 局所BOX間高不純物ドーピングによるDSOI MOSFETの特性改善, 山田辰哉, 宮澤吉康, 中島義賢, 花尻達郎, 鳥谷部達, 菅野卓雄, 応用物理学会学術講演会講演予稿集, 69th,   2008年09月02日
  • ケルビンフォース顕微鏡を用いた電気的非標識免疫測定, 山下滋, 沼田慎吉, 安喜敦士, 東海林崇, 中島義賢, 前川透, 花尻達郎, 応用物理学関係連合講演会講演予稿集, 56th,   2009年03月30日

講演・口頭発表等

  • Electrophoretic mobility and resultant zeta potential of an individual cell analyzed by electrophoretic Coulter method, N. Takahashi, A. Aki, T. Ukai, Y. Nakajima, T. Maekawa, T. Hanajiri, 2009 International Semiconductor Device Research Symposium, ISDRS '09,   2009年12月01日
  • Proposal of heavily doped silicon between insulators MOSFETs and confirmation of their advantages by device simulation, T. Yamada, Y. Miyazawa, Y. Nakajima, T. Hanajiri, T. Toyabe, T. Sugano, 2009 International Semiconductor Device Research Symposium, ISDRS '09,   2009年12月01日
  • Correlation between high-density trap states and local stress near SOI/BOX interface in SIMOX wafers, Yoshikata Nakajima, Yukitoshi Watanabe, Tatsuro Hanajiri, Toru Toyabe, Takuo Sugano, 2009 International Semiconductor Device Research Symposium, ISDRS '09,   2009年12月01日
  • Discussion of origins of high-density trap states in SIMOX wafers, Yoshikata Nakajima, Takahiro Toda, Tatsuro Hanajiri, Toru Toyabe, Takuo Sugano, Proceedings of the 10th International Conference on ULtimate Integration of Silicon, ULIS 2009,   2009年07月23日, We have demonstrated that separation by implanted oxygen (SIMOX) wafers have high-density trap states in silicon-on-insulator (SOI) layer, which are distributed within about 30 nm from the SOI/buried oxide (BOX) interface in the SOI layer, nano-scale roughness at SOI/BOX interface, and local stress near SOI/BOX interface. Meanwhile, it is reported by Bjorkman et al. that there is a correlation between the stress in the SiO2 layer and the Si/SiO2 interface state density at midgap. From these results, we elucidate mutual relationships between trap states, roughness, and local stress. We discuss origin of the high-density trap states from a point of the local stress. ©2009 IEEE.
  • Suppression of DIBL in deca-nano SOI MOSFETs by controlling permittivity and thickness of BOX layers, Shunpei Abe, Yoshiyasu Miyazawa, Yoshikata Nakajima, Tatsuro Hanajiri, Toru Toyabe, Takuo Sugano, Proceedings of the 10th International Conference on ULtimate Integration of Silicon, ULIS 2009,   2009年07月23日, The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) fabricated on a Silicon-On-Insulator (SOI) substrate is effective to suppress Short Channel Effect (SCE), and is one of the most promising electron devices for Very Large Scale Integration (VLSI) circuits for higher speed, higher integration density, and lower power consumption, and it has been already demonstrated that SCE in deep submicron SOI MOSFETs comes from Drain-Induced Barrier Lowering (DIBL) at SOI/Buried OXide (BOX) interface by the author's group. This paper elucidates the roles of permittivity and thickness of BOX layers in suppressing the DIBL in SOI MOSFETs by performing numerical device simulations of SOI MOSFETs with various permittivity and thickness of BOX systematically and by visualizing distribution of dielectric flux lines and current flow lines as well as contour potential lines in MOSFETs. ©2009 IEEE.
  • Improvement of performance of Drain-Source-On-Insulator MOSFETs by using heavily doped-Si region between local BOX regions, T. Yamada, Y. Miyazawa, Y. Nakajima, T. Hanajiri, T. Toyabe, T. Sugano, Proceedings of the 10th International Conference on ULtimate Integration of Silicon, ULIS 2009,   2009年07月23日, Silicon On Insulator (SOI) MOSFETs have three problems due to Buried Oxide (BOX) layer: (1) suppression of thermal diffusion out of the SOI layer, (2) accumulation of excess carrier in the SOI layer, and (3) capture of carriers at trap states at the SOI/BOX interface. To reduce problems of thermal diffusion and excess carrier, Drain Source On Insulator (DSOI) MOSFETs were proposed. We simulate electrical behavior of DSOI MOSFETs and show those are not suitable for shrinking because of bulk punch through issue. And so, we proposed an advanced DSOI structure which silicon between local BOX region is heavily doped and we show subthreshold slope less than 100[mV/dec.] when gate length is 30[nm]. Also we show difference of thermal distribution between SOI and DSOI causes by structure. ©2009 IEEE.
  • Large magnetic field induced by carbon nanotube current - Proposal of carbon nanotube inductors, Kotaro Tsubaki, Hiroki Shioya, Jun'ichi Ono, Yoshitaka Nakajima, Tatsuro Hanajiri, Hiroshi Yamaguchi, Device Research Conference - Conference Digest, DRC,   2005年12月01日, New concepts of electronic components are needed to fabricate further high-performance integrated circuit. One of the new concepts is the incorporation of inductors into integrated circuits. The incorporation into integrated circuits, however, has the difficulty in three dimensional nano-fabrication technique, and the small effect due to the small quantity of magnetic permeability of μo = 4 π ×10-7 H/m and the large diameter of the inductor's wires. We have proposed the inductors made of carbon nanotube [1, 2]. Though the fabrication of the proposed inductor is still challenging and has many problems, merits of the proposed inductor are following, 1. Since the radius (r) of carbon nanotube are several nm, the magnetic field (H) induced by the current (I) in carbon nanotube is about one thousand times larger than that induced by the current in normal copper wire whose radius is about several μm. (H ≈ I/2πr) 2. According to the relation between magnetic field (H) in the inductor and inductance (L) of the inductor, 1/2 ∫ μH2dV ≈ 1/2 LI2, the large magnetic field (H) results in the large inductance (L). 3. Since the carbon nanotube can be bent with small curvature, the inductor made of carbon nanotube is smaller than the inductor made of copper or gold. In this paper, we have observed the large magnetic field induced by the small current in carbon nanotube using magnetic force microscope [3]. The used carbon nanotube was made by laser ablation method. After the dispersing the carbon nanotube on the SiO 2/Si substrate, gold/nickel metal interconnects to the carbon nanotube. By applying the alternating current in carbon nanotube, we have obtained the images of synchronized component in the force signal using lock' in measurement. Since the images were the convolution of Kelvin force microscopy and magnetic force microscopy images, we extracted the magnetic field distribution using the symmetry difference between the magnetic and electric field. Observed magnetic fields were proportional to the amplitude of the alternating current. The estimated magnetic field near the carbon nanotube of 8 mT at 250 μA roughly agrees with the theoretical one. This magnetic field is also very large compared with that produced by the copper wire in the normal inductor. Since the inductance of 1.0 μm long carbon nanotube is estimated to be about 1 pH, normalized inductance is found to be larger than that of normal inductance [2]. Therefore, carbon nanotube inductors are promising passive electric component for the integrated circuit. © 2005 IEEE.
  • Suppression of DIBL of deep sub-micron FD SOI MOSFETs by source/drain engineering, Y. Nakajima, T. Hanajiri, T. Toyabe, T. Morikawa, T. Sugano, 2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings,   2003年01月01日, We have already revealed that shon channel effect is caused by DlBL (Drain Induced Barrier Lowering) at SOIWOX (Buried Oxide) interface, which is induced by electric field from the drain region penetrating through BOX [1]. In order to suppress the DIBL at SOVBOX interface. we will propose novel FD (Fully Depleted) SOI MOSFETs.
  • Breakdown of a simple scaling rule of SOI MOSFETs and its prolong by thinning BOX, T. Hanajiri, M. Niizato, K. Aoto, T. Toyabe, Y. Nakajima, T. Morikawa, T. Sugano, 2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings,   2003年01月01日, We demonstrated that a simple scaling rule of SO1 (Silicon on insulator) MOSFETs breaks down in ultra thin SO1 MOSFETs with deep sub-micron gates, and that thinning of BOX (Buried -Oxid e) as well as SO1 layer is effective to prolong the scaling rule.

競争的資金

  • SOI MOSFETにおけるKink効果の抑制
  • SOI基板が有するトラップ準位のナノプローブによる解析、およびその起源の解明